The reliable, accurate and cost-effective integration of optical coupling elements and optical connectors with waveguides structures is a challenge. The performance of high-end computer systems continues to be limited less by microprocessor clock speeds and more by the interconnections between microprocessors. As data rates increase, traditional copper links are limited to shorter distances, especially in the face of power constraints and high aggregate bandwidths. For board-to-board and rack-to-rack interconnects, the edge connector density is starting to limit the overall throughput. The incorporation of highly-parallel optical data links into these systems could offer superior performance in terms of density, power dissipation and cost.
Parallel optical modules include arrays of silicon circuitry connected to optoelectronic (OE) devices implemented using III-V semiconductors. These modules may be positioned in close proximity to a printed circuit board that may contain one or more optical waveguide channels. The light can be coupled into the waveguides, and then easily routed across the circuit board to other optical modules. The waveguides may be on the top of the board or embedded within the board. This embedded waveguide arrangement, shown in FIG. 1, is similar to the one described in Khakravorty et al., “Flip-Chip Package Integrating Optical and Electrical Devices and Coupling to a Waveguide on a Board,” U.S. Patent Application Publication 2003/0002770A1, Jan. 2, 2003.
In the past, the alignment between the OE devices (or lens arrays) and the waveguide cores were realized by actively aligning the OE or coupling elements through the use of sophisticated tooling; powering up the OE devices, and monitoring the light coupled into the waveguide core. This process was time consuming and costly.
Referring now to FIG. 1, there is depicted therein a cross-sectional view of the optical coupling between an OE module 102 and the core layer 116 of a polymer waveguide film, according to the prior art. In this case, an OE device array 106 is supported on a carrier substrate 108 that also contains a collimating lens array element 110. This assembly, also known as the OE module, is attached to the PCB substrate 112 by a solder ball grid array (BGA), pin grid array, land grid array, or other techniques, all of which are suggested by ball elements 114. Light from the OE module 102 is gathered by the waveguide lens array coupling element 115 and focused into the core 116 of an optical waveguide 118 formed by core 116 and cladding 104. Depending upon the size of the waveguide core 116, the waveguide lens array 115 must be centered with respect to the core 116 to within 5 to 10 microns. In this case an alignment hole 120 (precisely aligned to the waveguide core 116) was fabricated in a copper layer 122 adjacent to the waveguide layer 118. The process to fabricate this alignment hole 120 requires precise and accurately tooling leading to increased process complexity and cost. Next, the waveguide lens array 115 with its corresponding alignment pin 124 is placed on top of the waveguide layer 118 and its alignment pin 124 inserted into the alignment hole 120. Thus, precise alignment of the waveguide lens array assembly 115 is realized, however, fabrication of the waveguide reference hole 120 required substantial time and expense.
Accordingly, it would be desirable to overcome the limitations of prior art approaches.